Research output per year
Research output per year
Research output
- 47 results
Search results
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2018
Domain Classification
Mowbray, M. & Hagen, J., 14 Jun 2018, 8 Feb 2018, Priority date 31 Aug 2015, Priority No. PCT/US2015/047696Research output: Patent
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2017
Method and device for detecting a smoking gesture
Skinner, A., Stone, C. J., Doughty, H. & Munafo, M., 3 Aug 2017, IPC No. A61B 5/11, World Intellectual Property Organisation, Patent No. WO 2017/129946, 18 Jan 2017, Priority date 26 Jan 2016, Priority No. 1601342.7Research output: Patent
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2016
Processor instruction set for controlling an event source to generate events used to schedule threads
May, D., 14 Jun 2016, Patent No. US 9,367,321Research output: Patent
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2015
Synchronising groups of threads with dedicated hardware logic
May, D., 24 Feb 2015, Patent No. US 8,966,488Research output: Patent
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2014
Processor architecture for use in scheduling threads in response to communication activity
May, D., 25 Nov 2014, Patent No. US 8,898,438Research output: Patent
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2012
Interface processor
May, D., 10 Jul 2012, IPC No. G06F 9/00 9/30, Patent No. US8219789Research output: Patent
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Message routing scheme for an array having a switch with address comparing component and message routing component
May, D., 22 May 2012, IPC No. G06F 15/00, Patent No. US8185719Research output: Patent
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Processor communication tokens
May, D., 17 Jun 2012, IPC No. G06F 15/16, Patent No. US8224884Research output: Patent
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Processor instruction set for controlling threads to respond to events
May, D., 22 May 2012, IPC No. G06F 9/40, Patent No. US8185722Research output: Patent
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SIMD array operable to process different respective packet protocols simultaneously while executing a single common instruction stream
McIntosh-Smith, S. N., Rhoades, J., Cameron, K., Winser, P., McConnell, R. & Panesar, G., 28 Feb 2012, Patent No. 8127112Research output: Patent
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Token protocol
May, D., 20 Mar 2012, IPC No. H04L 12/403, Patent No. US8139601Research output: Patent
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2011
Crystal ID - Patent ID 1013432.8
Burghardt, T. & Barham, PJ., 2011, Patent No. 1013432.8Research output: Patent
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Message routing scheme
May, D., 14 Jun 2011, IPC No. G06F 15/00, Patent No. US7962717Research output: Patent
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Method and apparatus for interactive broadcasting
Cliff, D., Low, C. & Hawkes, R., 18 Dec 2011, Patent No. 8042050Research output: Patent
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Processor with memory access stage adapted to fetch an instruction of a thread when no memory access operation is detected
May, D., 7 Jun 2011, IPC No. G06F 9/30 9/40 13/00 13/28 3/00, Patent No. US7958333Research output: Patent
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2010
Compact instruction set encoding
May, D., 9 Mar 2010, IPC No. G06F 9/00, Patent No. US7676653Research output: Patent
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2009
Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processor
May, D., Hedinger, P. & Dixon, A., 3 Nov 2009, IPC No. G06F 13/14, Patent No. US7613909Research output: Patent
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Scheduling thread upon ready signal set when port transfers data on trigger time activation
May, D., Hedinger, P. & Dixon, A., 10 Nov 2009, IPC No. G06F 13/00, Patent No. US7617386Research output: Patent
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2000
A computer system for executing branch instructions
Sidwell, N. & Sturges, A., 2000, Patent No. EP1003095Research output: Patent
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1999
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Computer and a method of operating a computer to combine data values within a singularly addressable data string
Sidwell, N., 1999, Patent No. US5884069Research output: Patent
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Generation and use of compressed image data
Sidwell, N. & Stuttard, D., 1999, Patent No. EP0905654Research output: Patent
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Interrupt and control packets for a microcomputer
May, D. & Jones, A., 1999, Patent No. EP959412Research output: Patent
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Method for transposing multi-bit matrix wherein first and last sub-string remains unchanged while intermediate sub-strings are interchanged
Sidwell, N. & Barnaby, C., 1999, Patent No. US5875355Research output: Patent
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Microcomputer chips with interconnected address and data paths
May, D. & Jones, A., 1999, Patent No. EP953916Research output: Patent
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Microcomputer with bit packets for interrupts, control and memory access
May, D. & Jones, A., 1999, Patent No. EP953914Research output: Patent
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Microcomputer with interrupt packets
May, D. & Jones, A., 1999, Patent No. EP953913Research output: Patent
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Microcomputer with packet translation for event packets and memory access packets
May, D. & Jones, A., 1999, Patent No. EP953915Research output: Patent
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Packet distribution in a microcomputer
May, D. & Jones, A., 1999, Patent No. EP959411Research output: Patent
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Split branch system utilizing separate set branch, condition and branch instructions and including dual instruction fetchers
Sidwell, N. & Sturges, A., 1999, Patent No. US5961637Research output: Patent
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System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis
May, D., Sturges, A. & Sidwell, N., 1999, Patent No. US6009508Research output: Patent
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1998
A cache system
May, D., Farrell, G., Sturges, A., Fel, B. & Barneby, C., 1998, Patent No. EP856798Research output: Patent
4 Citations (Scopus) -
A cache system for concurrent processes
May, D. & Sturges, A., 1998, Patent No. EP856797Research output: Patent
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System and method for restructuring data strings
Sidwell, N., 1998, Patent No. US5822619Research output: Patent
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System and method for restructuring data strings
Sidwell, N., 1998, Patent No. US5822619Research output: Patent
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1997
A communications device
May, D., Parsons, B., Thompson, P. & Walker, C., 1997, Patent No. EP611014Research output: Patent
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Message Routing
May, D., Thompson, P., Parsons, B. & Walker, C., 1997, Patent No. EP405989Research output: Patent
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Message Routing
May, D., Parsons, B., Thompson, P. & Walker, C., 1997, Patent No. EP405990Research output: Patent
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1996
Apparatus providing addressable storage locations as virtual links and storing predefined destination information for any messages transmitted on virtual links at these locations
May, D., Parsons, B., Thompson, P. & Walker, C., 1996, Patent No. US5495619Research output: Patent
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Microcomputer with high density ram in separate isolation well on single chip
May, D., Edwards, J. & Waller, D., 1996, Patent No. US5491359Research output: Patent
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Microcomputer with high density RAM in separate isolation well on single chip
May, D., Edwards, J. & Waller, D., 1996, Patent No. US5506437Research output: Patent