Projects per year
My current research focuses on challenges in cryptographic engineering, the implementation (in hardware and/or software) of and implementation attacks (relating to both side-channel and fault attacks) on cryptographic primitives and arithmetic in particular. I am also interested in the design of (general-purpose) processors, compilers, and programming languages. My previous work in these fields has included
- implementation using novel processors and/or hardware (e.g., implementation of RSA on GPU-based, multi-core, and SIMD-enabled platforms),
- novel side-channel attacks and countermeasures (e.g., non-deterministic processor designs, attacks using cache memory as a side-channel), and
- domain specific compiler/language support for cryptography (e.g., optimisation of AES, automatic side-channel countermeasures for ECC).
1/09/20 → 31/08/24
Marshall, B., Page, D. & Pham, T. H., 2 Mar 2020, In: IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES). 2020, 2, p. 73--98
Research output: Contribution to journal › Article (Academic Journal) › peer-reviewOpen Access
Marshall, B., Page, D. & Pham, T. H., 17 Nov 2020, HASP '20: Proceedings of the 9th International Workshop on Hardware and Architectural Support for Security and Privacy.
Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)
Marshall, B., Newell, G. R., Page, D., Markku-Juhani O., S. & Wolf, C., 3 Dec 2020, In: IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES). 2021, 1, p. 109-136 28 p.
Research output: Contribution to journal › Article (Academic Journal) › peer-reviewOpen AccessFile25 Downloads (Pure)