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Dr Daniel PagePh.D.(Bristol)

Senior Lecturer in Computer Science

61 - 69 out of 69Page size: 10
  1. 2003
  2. Published

    Using media processors for low-memory AES implementation

    Page, D. & Irwin, J. P. J., 2003, Application-specific Systems, Architectures and Processors - ASAP 2003. Institute of Electrical and Electronics Engineers (IEEE), p. 144--154

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. 2002
  4. Published

    Caches with compositional performance

    Irwin, J. P. J., Page, D., May, D. & Muller, H. L., 2002, Embedded Processor Design Challenges. Springer Berlin Heidelberg, Vol. 2268. p. 242-259

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Published

    Hardware implementation of finite fields of characteristic three

    Page, D. & Smart, N. P., 2002, Cryptographic Hardware and Embedded Systems - CHES 2002. Springer Berlin Heidelberg, Vol. 2523. p. 529-539

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Published

    Instruction stream mutation for non-deterministic processors

    Irwin, J. P. J., Page, D. & Smart, N. P., 2002, Application-specific Systems, Architectures and Processors - ASAP 2002. Institute of Electrical and Electronics Engineers (IEEE), p. 286-295

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. Published

    Predictable instruction caching for media processors

    Irwin, J. P. J., Page, D., May, D. & Muller, H. L., 2002, Application-specific Systems, Architectures and Processors - ASAP 2002. Institute of Electrical and Electronics Engineers (IEEE), p. 141 - 150 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Published

    Software implementation of finite fields of characteristic three, for use in pairing based cryptosystems

    Harrison, K., Page, D. & Smart, N. P., 2002, In : LMS Journal of Computation and Mathematics. 5, p. 181--193

    Research output: Contribution to journalArticle

  9. 2001
  10. Published

    Effective use of partitioned cache memories

    Page, D., 2001

    Research output: Other contributionPhD thesis (not Bristol)

  11. 2000
  12. Published

    Effective caching for multithreaded processors

    May, D., Irwin, J., Muller, H. L. & Page, D., 2000, Communicating Process Architectures - CPA 2000. IOS Press, p. 145-154 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  13. 1999
  14. Published

    Microcaches

    May, D., Page, D., Irwin, J. & Muller, H. L., 1999, High Performance Computing - HiPC 1999. Springer Berlin Heidelberg, Vol. 1745. p. 21-27

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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