Projects per year
Analogue IC Design, Power Management IC design, High speed high voltage gate driver design.
17/06/13 → 16/06/18
Research Output per year
A new design technique for sub-nanosecond delay and 200 V/ns power supply slew-tolerant floating voltage level shifters for GaN SMPSLiu, D., Hollis, S. & Stark, B., 1 Mar 2019, In : IEEE Transactions on Circuits and Systems - I: Regular Papers. 66, 3, p. 1280-1290 11 p., 8535039.
Research output: Contribution to journal › Article (Academic Journal)
Building blocks for future dual-channel GaN gate drivers Arbitrary waveform driver, bootstrap voltage supply, and level shifterLiu, D., Dymond, H., Wang, J. & Stark, B., 23 May 2019. 4 p.
Research output: Contribution to conference › Conference Paper
Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)