Project Details
| Status | Finished |
|---|---|
| Effective start/end date | 1/03/00 → 1/06/03 |
MODELLING AND VERIFICATION OF INTERCONNECTS FOR SYSTEM ON-CHIP ARCHITECTURES
- Eder, Kerstin I (Principal Investigator)
| Status | Finished |
|---|---|
| Effective start/end date | 1/03/00 → 1/06/03 |