3-D memory organization and performance analysis for multi-processor network-on-chip architecture

Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerasekera, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

19 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	2009 IEEE International Conference on 3D System Integration
Pages	1-7
Number of pages	7
DOIs	https://doi.org/10.1109/3DIC.2009.5306593
Publication status	Published - 2009

Research Groups and Themes

@inproceedings{33925ba70f3946eb892403290eb57864,

title = "3-D memory organization and performance analysis for multi-processor network-on-chip architecture",

author = "Weldezion, \{Awet Yemane\} and Zhonghai Lu and Roshan Weerasekera and Hannu Tenhunen",

year = "2009",

doi = "10.1109/3DIC.2009.5306593",

language = "Undefined/Unknown",

pages = "1--7",

booktitle = "2009 IEEE International Conference on 3D System Integration",

}

TY - GEN

T1 - 3-D memory organization and performance analysis for multi-processor network-on-chip architecture

AU - Weldezion, Awet Yemane

AU - Lu, Zhonghai

AU - Weerasekera, Roshan

AU - Tenhunen, Hannu

PY - 2009

Y1 - 2009

U2 - 10.1109/3DIC.2009.5306593

DO - 10.1109/3DIC.2009.5306593

M3 - Conference Contribution (Conference Proceeding)

SP - 1

EP - 7

BT - 2009 IEEE International Conference on 3D System Integration

ER -