TY - GEN
T1 - A 0.8-V 1.2-μW rail-to-rail fully differential OpAmp with adaptive biasing
AU - Valero, M. R.
AU - Celma-Pueyo, Santiago
AU - Medrano, N.
AU - Calvo, B.
PY - 2012/12/14
Y1 - 2012/12/14
N2 - This paper presents an ultra low-power rail-to-rail fully differential operational amplifier (OpAmp) fabricated in a standard 0.18 μm CMOS technology. The proposed circuit uses transistors biased in the sub-threshold region for low-voltage low-power operation. For a 0.8 V single supply and 8 pF loads, experimental measurements shows a 51 dB open loop gain, 62° phase margin, 57 kHz unity gain frequency and a 750 mV linear output swing. Adaptive biasing provides 0.14 V/μs slew-rate, while a 73 dB CMRR is achieved thanks to a CMFF circuit, demonstrating the correct functionality of the OpAmp with a power consumption of 1.2 μW.
AB - This paper presents an ultra low-power rail-to-rail fully differential operational amplifier (OpAmp) fabricated in a standard 0.18 μm CMOS technology. The proposed circuit uses transistors biased in the sub-threshold region for low-voltage low-power operation. For a 0.8 V single supply and 8 pF loads, experimental measurements shows a 51 dB open loop gain, 62° phase margin, 57 kHz unity gain frequency and a 750 mV linear output swing. Adaptive biasing provides 0.14 V/μs slew-rate, while a 73 dB CMRR is achieved thanks to a CMFF circuit, demonstrating the correct functionality of the OpAmp with a power consumption of 1.2 μW.
UR - http://www.scopus.com/inward/record.url?scp=84870809303&partnerID=8YFLogxK
U2 - 10.1109/ESSCIRC.2012.6341260
DO - 10.1109/ESSCIRC.2012.6341260
M3 - Conference Contribution (Conference Proceeding)
AN - SCOPUS:84870809303
SN - 9781467322126
T3 - European Solid-State Circuits Conference
SP - 77
EP - 80
BT - 2012 Proceedings of the European Solid State Circuits Conference, ESSCIRC 2012
T2 - 38th European Solid State Circuits Conference, ESSCIRC 2012
Y2 - 17 September 2012 through 21 September 2012
ER -