A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

1 Citation (Scopus)

Original language	Undefined/Unknown
Title of host publication	2015 IEEE MTT-S International Microwave Symposium
Pages	1-4
Number of pages	4
DOIs	https://doi.org/10.1109/MWSYM.2015.7166838
Publication status	Published - 2015

Research Groups and Themes

@inproceedings{4155750b645d4098920fd1148038ced8,

title = "A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS",

author = "Shunli Ma and Sai Manoj and Hao Yu and Junyan Ren and Roshan Weerasekera",

year = "2015",

doi = "10.1109/MWSYM.2015.7166838",

language = "Undefined/Unknown",

pages = "1--4",

booktitle = "2015 IEEE MTT-S International Microwave Symposium",

}

TY - GEN

T1 - A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS

AU - Ma, Shunli

AU - Manoj, Sai

AU - Yu, Hao

AU - Ren, Junyan

AU - Weerasekera, Roshan

PY - 2015

Y1 - 2015

U2 - 10.1109/MWSYM.2015.7166838

DO - 10.1109/MWSYM.2015.7166838

M3 - Conference Contribution (Conference Proceeding)

SP - 1

EP - 4

BT - 2015 IEEE MTT-S International Microwave Symposium

ER -