A Defect Tolerance Scheme for Nanotechnology Circuits

[No Value] Al-Yamani, [No Value] Ramsundar, Dhiraj Pradhan

Research output: Contribution to journal › Article (Academic Journal) › peer-review

Translated title of the contribution	A Defect Tolerance Scheme for Nanotechnology Circuits
Original language	English
Article number	-
Journal	IEEE Trans. On Circuits and Sytems I
Publication status	Published - 2008

Other identifier: 2000839

Access to Document

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title = "A Defect Tolerance Scheme for Nanotechnology Circuits",

author = "Al-Yamani, {[No Value]} and Ramsundar, {[No Value]} and Dhiraj Pradhan",

note = "Other identifier: 2000839",

year = "2008",

language = "English",

journal = "IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications",

issn = "1057-7122",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

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T1 - A Defect Tolerance Scheme for Nanotechnology Circuits

AU - Al-Yamani, [No Value]

AU - Ramsundar, [No Value]

AU - Pradhan, Dhiraj

N1 - Other identifier: 2000839

PY - 2008

Y1 - 2008

M3 - Article (Academic Journal)

JO - IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications

JF - IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications

SN - 1057-7122

M1 - -

ER -