A Digital Predistortion System With Extended Correction Bandwidth With Application to LTE-A Nonlinear Power Amplifiers

Oualid Hammi, Andrew Kwan, Souheil Bensmida, Kevin A. Morris, Fadhel M. Ghannouchi

Research output: Contribution to journalArticle (Academic Journal)peer-review

41 Citations (Scopus)
664 Downloads (Pure)

Abstract

This article presents a bandwidth extended digital predistortion system suitable for LTE-advanced applications. The proposed predistortion system uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function. The proposed predistorter was experimentally validated and its performance benchmarked against a predistorter having the same structure but identified using the conventional approach. The measurement results demonstrate that the proposed predistorter requires 30% less sampling speed for the analog to digital converter of the feedback path.

Original languageEnglish
Pages (from-to)3487-3495
Number of pages9
JournalIEEE Transactions on Circuits and Systems - I: Regular Papers
Volume61
Issue number12
Early online date4 Sep 2014
DOIs
Publication statusPublished - Dec 2014

Keywords

  • Analog to digital converter (ADC)
  • digital predistortion (DPD)
  • distortion
  • field programmable gate arrays
  • memory effects
  • nonlinearity
  • power amplifier (PA)

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