This paper proposes a general circuit model and design method for resonant gate drivers. Topologies in the literature are analyzed by dividing each switching transient into up to five energy transfer stages, for which general analytical equations are derived. A general resonant gate driver circuit model is presented. Several reviewed topologies are identified as unique combinations of current paths within this circuit model, providing a basis for classification. This establishes a relationship between topology performance and architecture, which is verified experimentally using a reconfigurable test circuit.
|Translated title of the contribution||A First Approach to a Design Method for Resonant Gate Driver Architectures|
|Pages (from-to)||3855 - 3868|
|Number of pages||14|
|Journal||IEEE Transactions on Power Electronics|
|Publication status||Published - Aug 2012|