Projects per year
Abstract
The alignment of code in the flash memory of deeply embedded SoCs can have a large impact on the total energy consumption of a computation. We investigate the effect of code alignment in six SoCs and find that a large proportion of this energy (up to 15% of total SoC energy consumption) can be saved by changes to the alignment. A flexible model is created to predict the read-access energy consumption of flash memory on deeply embedded SoCs, where code is executed in place. This model uses the instruction level memory accesses performed by the processor to calculate the flash energy consumption of a sequence of instructions. We derive the model parameters for five SoCs and validate them. The error is as low as 5%, with a 11% average normalized RMS deviation overall. The scope for using this model to optimize code alignment is explored across a range of benchmarks and SoCs. Analysis shows that over 30% of loops can be better aligned. This can significantly reduce energy while increasing code size by less than 4%. We conclude that this effect has potential as an effective optimization, saving significant energy in deeply embedded SoCs. Copyright is held by the owner/author(s).
Original language | English |
---|---|
Title of host publication | 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014 |
Publisher | Association for Computing Machinery (ACM) |
ISBN (Print) | 978-1-4503-3050-3 |
DOIs | |
Publication status | Published - 12 Oct 2014 |
Event | 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014 - New Delhi, United Kingdom Duration: 12 Oct 2014 → 17 Oct 2014 |
Conference
Conference | 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2014 |
---|---|
Country/Territory | United Kingdom |
City | New Delhi |
Period | 12/10/14 → 17/10/14 |
Keywords
- embedded, energy, flash, model