A method to extend orthogonal latin square codes

Pedro Reviriego, Salvatore Pontarelli, Alfonso Sanchez-Macian, Juan Antonio Maestro

Research output: Contribution to journalArticle (Academic Journal)peer-review

15 Citations (Scopus)

Abstract

Error correction codes (ECCs) are commonly used to protect memories from errors. As multibit errors become more frequent, single error correction codes are not enough and more advanced ECCs are needed. The use of advanced ECCs in memories is, however, limited by their decoding complexity. In this context, one-step majority logic decodable (OS-MLD) codes are an interesting option as the decoding is simple and can be implemented with low delay. Orthogonal Latin squares (OLS) codes are OS-MLD and have been recently considered to protect caches and memories. The main advantage of OLS codes is that they provide a wide range of choices for the block size and the error correction capabilities. In this brief, a method to extend OLS codes is presented. The proposed method enables the extension of the data block size that can be protected with a given number of parity bits thus reducing the overhead. The extended codes are also OS-MLD and have a similar decoding complexity to that of the original OLS codes. The proposed codes have been implemented to evaluate the circuit area and delay needed for different block sizes.

Original languageEnglish
Article number6576208
Pages (from-to)1635-1639
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume22
Issue number7
DOIs
Publication statusPublished - 1 Jan 2014

Keywords

  • Error correction codes (ECCs)
  • Latin squares
  • majority logic decoding
  • memory.

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