Translated title of the contribution | A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application |
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Original language | English |
Title of host publication | To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010 |
Publication status | Published - 2010 |
Bibliographical note
Other page information: -Conference Proceedings/Title of Journal: To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010
Other identifier: 2001093