A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application

Singh Jawar; [No Value] K. Ramakrishnan; Mookerjea S.; Datta S.; Narayanan V.; Dhiraj Pradhan

A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application

Singh Jawar, [No Value] K. Ramakrishnan, Mookerjea S., Datta S., Narayanan V., Dhiraj Pradhan

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

Translated title of the contribution	A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application
Original language	English
Title of host publication	To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010
Publication status	Published - 2010

Bibliographical note

Other page information: -
Conference Proceedings/Title of Journal: To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010
Other identifier: 2001093

Access to Document

http://www.cs.bris.ac.uk/Publications/pub_master.jsp?id=2001093

Cite this

@inproceedings{5928ced12c054bab9479fa9907eb5308,

title = "A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application",

author = "Singh Jawar and {K. Ramakrishnan}, {[No Value]} and Mookerjea S. and Datta S. and Narayanan V. and Dhiraj Pradhan",

note = "Other page information: - Conference Proceedings/Title of Journal: To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010 Other identifier: 2001093",

year = "2010",

language = "English",

booktitle = "To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010",

}

A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application. / Jawar, Singh; K. Ramakrishnan, [No Value]; S., Mookerjea; S., Datta; V., Narayanan; Pradhan, Dhiraj.

To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010. 2010.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - A Novel Si-Tunnel FET SRAM Design for Ultra Low-Power 0.3V VDD Application

AU - Jawar, Singh

AU - K. Ramakrishnan, [No Value]

AU - S., Mookerjea

AU - S., Datta

AU - V., Narayanan

AU - Pradhan, Dhiraj

N1 - Other page information: - Conference Proceedings/Title of Journal: To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010 Other identifier: 2001093

PY - 2010

Y1 - 2010

M3 - Conference Contribution (Conference Proceeding)

BT - To appear in the proceedings of 15th Asia South Pacific Design Automation Conference (ASPDAC), January, Taipei, Taiwan, 2010

ER -