Abstract
The memristor is one among the most promising emerging technologies for enabling a new generation of Non Volatile Memories. The memristor operates faster than a Phase Change Memory (PCRAM) and has a simpler structure than a magnetic memory (MRAM), while making possible the design of cross-point structures in crossbars at very high density. The presence of sneak path currents however causes an increase in power consumption and a reduction in data integrity and performance. To overcome this issue a novel write method is proposed to reduce the effects of sneak paths. Extensive SPICE simulations are provided to evidence the advantages of the proposed method.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012 |
| Pages | 168-173 |
| Number of pages | 6 |
| Publication status | Published - 1 Dec 2012 |
| Event | 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012 - Amsterdam, United Kingdom Duration: 4 Jul 2012 → 6 Jul 2012 |
Conference
| Conference | 2012 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2012 |
|---|---|
| Country/Territory | United Kingdom |
| City | Amsterdam |
| Period | 4/07/12 → 6/07/12 |
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