A placement strategy for reducing the effects of multiple faults in digital circuits

Samuel N. Pagliarini, Dhiraj Pradhan

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

10 Citations (Scopus)

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Finished
PROCESS VARIATION AWARE SYNTHESIS OF NANO-CMOS CIRCUITS
Pradhan, D. K. (Principal Investigator)
1/10/09 → 1/03/13
Project: Research