A Practical Approach for Core Loss Estimation of a High-Current Gapped Inductor in PWM Converters With a User-Friendly Loss Map

Core loss estimation of filter inductors is critical for modelling and optimising high-frequency, high-efficiency and high-density Pulse Width Modulation (PWM) power electronics converters. However, data provided by inductor core manufacturers is insufficient for core loss estimation in PWM converters, particularly in the case of customized gapped inductors. This paper presents a whole process of characterising and estimating the core loss of a customised high-current gapped inductor for PWM converters. To excite the inductor for the B-H loop measurement, a test circuit formed by a half-bridge structure is proposed to compensate the asymmetric rectangular voltage on the inductor caused by the device voltage drops. To overcome the other challenges raised by high excitation current, a discontinuous test procedure, Triple Pulse Test (TPT), is applied to reduce the requirements of the high-current test setup (thermal stress, current-time stress for current probes, capacity of dc sources, etc.). For practical purposes, a user-friendly loss map approach is proposed involving only time-domain and electrical variables to replace magnetic variables to enable straightforward loss mapping process and core loss calculations. Presented experimental results show consistency between the estimated inductor loss and measured values.