A toolset for the analysis and optimization of motion estimation algorithms and processors

T Spiteri, G Vafiadis, JL Nunez-Yanez

    Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

    3 Citations (Scopus)
    761 Downloads (Pure)

    Abstract

    This paper presents a reconfigurable processor designed to execute user-defined block-matching motion estimation algorithms, and a toolset for the design of such algorithms and for the configuration of the processor. The toolset enables the exploration of the processor's design space in order to find an optimal configuration depending on the target application. The use of the toolset to test different configurations for different kinds of video sequences is illustrated. Experimental results show the benefits and cost of certain optimizations in the motion estimation process, and that fast block-matching search algorithms can outperform full search algorithms commonly used in hardware implementations. The usefulness of the toolset in exploring the configuration space is also shown.
    Translated title of the contributionA toolset for the analysis and optimization of motion estimation algorithms and processors
    Original languageEnglish
    Title of host publicationInternational Conference on Field Programmable Logic and Applications, 2009 (FPL 2009), Prague
    PublisherInstitute of Electrical and Electronics Engineers (IEEE)
    Pages423 - 428
    Number of pages5
    ISBN (Print)19461488
    DOIs
    Publication statusPublished - Aug 2009
    EventInternational Conference on Field Programmable Logic and Applications - Prague, Czech Republic
    Duration: 1 Aug 2009 → …

    Conference

    ConferenceInternational Conference on Field Programmable Logic and Applications
    Country/TerritoryCzech Republic
    CityPrague
    Period1/08/09 → …

    Bibliographical note

    Rose publication type: Conference contribution

    Additional information: With accompanying conference presentation

    Sponsorship: The authors gratefully acknowledge the support obtained from the UK EPSRC under grant number EP/E062164/1.

    Terms of use: Copyright © 2009 IEEE. Reprinted from International Conference on Field Programmable Logic and Applications, 2009 (FPL 2009).
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    ISSN: 9781424438921

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