Algorithm Level Fault Tolerance: a Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms

Lisboa Carlo, Argyrides Costas, Dhiraj Pradhan, Carro Luigi

Research output: Contribution to journalArticle (Academic Journal)peer-review

5 Citations (Scopus)

Abstract

For technologies beyond the 45 nm node, radiation induced transients will last longer than one clock cycle. In this scenario, temporal redundancy techniques will no longer be able to cope with radiation induced soft errors, while spatial redundancy techniques still impose high power and area overheads. The solution to this impasse is the use of algorithm level techniques, able to detect and correct errors with low cost. In this paper, a new approach to deal with this problem is proposed, and applied to matrix multiplication algorithm. The proposed technique is compared to previously published fault tolerance techniques, and the costs of detection and recomputation for both approaches are compared and discussed.
Translated title of the contributionAlgorithm Level Fault Tolerance: a Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms
Original languageEnglish
Article number-
JournalIEEE VLSI Test Symposium (VTS) 2008
Publication statusPublished - 2008

Bibliographical note

Other identifier: 2000812

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