An Analytical Method for Fast Calculation of Inductor Operating Space for High-Frequency Core Loss Estimation in Two-level and Three-level PWM Converters

Jun Wang, Navid Rasekh, Xibo Yuan*, Kfir J Dagan

*Corresponding author for this work

Research output: Contribution to journalArticle (Academic Journal)peer-review

15 Citations (Scopus)
196 Downloads (Pure)


Along the advances of wide-bandgap power devices, the pulse width modulation (PWM) converters are developing towards higher switching frequencies in recent years. Accurate estimation of the high-frequency power losses of magnetic
components, the core loss in particular, has been a challenge for PWM converters. While the conventional approaches based on Steinmetz Equation lose the accuracy in PWM excitations, the “loss map” approach has been proposed recently as a practical method to accurately estimate the inductor core loss. To calculate the core loss, the inputs of the loss map need to be retrieved from the steady-state inductor voltage/current waveforms. As a supplement to the loss map approach, this work proposes an analytical method to rapidly generate the inputs (inductor
operating space) for the loss map to replace the efforts in building simulation models and experimental rigs. The proposed approach relies on the operation and modulation principles of PWM converters and enables computerized calculation of the operating space and the inductor core loss. The proposed approach is developed for both 2-level and 3-level converters and validated by experiments. The results reveal that a 3-level converter running the same inductor generates less than half the core loss compared to a 2-level converter, when the maximum current ripple is kept equivalent. The proposed approach is based on the operation principles of the converter topology and therefore can be applied
generally regardless of the core material or the design of the inductor, as long as the loss map of the inductor is pre-produced.
Original languageEnglish
Article number9258916
Pages (from-to)650-663
Number of pages14
JournalIEEE Transactions on Industry Applications
Issue number1
Early online date16 Nov 2020
Publication statusPublished - 1 Jan 2021

Bibliographical note

Funding Information:
Manuscript received April 20, 2020; revised August 4, 2020 and October 2, 2020; accepted November 3, 2020. Date of publication November 16, 2020; date of current version December 31, 2020. Paper 2020-IPCC-0534.R2, presented at the 2019 IEEE Applied Power Electronics Conference and Exposition (APEC), Anaheim, CA, USA, Mar. 17–21, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power Converter Committee of the IEEE Industry Applications Society. This work was supported in part by the UK Royal Academy of Engineering. (Corresponding author: Xibo Yuan.) The authors are with the Department of Electrical and Electronic Engineering, University of Bristol, BS8 1TL Bristol, U.K. (e-mail:;;;

Publisher Copyright:
© 1972-2012 IEEE.


  • core loss
  • loss map
  • pulse width modulation
  • three-level converter
  • virtual prototyping


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