An asynchronous interconnect architecture for device security enhancement

SJ Hollis, SW Moore

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

1 Citation (Scopus)
Translated title of the contributionAn asynchronous interconnect architecture for device security enhancement
Original languageEnglish
Title of host publication19th International Conference on VLSI Design, Hyderabad, India, 3-7 January 2005
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages209 - 215
Number of pages7
DOIs
Publication statusPublished - Jan 2006

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