An efficient technique to select logic nodes for single event transient pulse-width reduction

Nihaar N Mahatme, Indranil Chatterjee, Akash Patki, Daniel B Limbrick, Bharat L Bhuva, Ronald D Schrimpf, William Robinson

Research output: Contribution to journalArticle (Academic Journal)peer-review

6 Citations (Scopus)
Original languageEnglish
Pages (from-to)114-117
Number of pages4
JournalMicroelectronics Reliability
Volume53
Issue number1
Publication statusPublished - 2013

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