An Empirical Comparison of the RISC-V and AArch64 Instruction Sets

Dan B A Weaver; Simon N McIntosh-Smith

doi:10.1145/3624062.3624233

An Empirical Comparison of the RISC-V and AArch64 Instruction Sets

Dan B A Weaver, Simon N McIntosh-Smith

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

2 Citations (Scopus)

Abstract

In this work we perform one of the first in-depth, empirical comparisons of the Arm and RISC-V instruction sets. We compare a series of benchmarks compiled with GCC 9.2 and 12.2, targeting the scalar subsets of Arm’s Armv-8a and RISC-V’s rv64g. We analyse instruction counts, critical paths and windowed critical paths to get an estimate of performance differences between the two instruction sets, determining where each has advantages and disadvantages. The results show the instruction sets are relatively closely matched on the metrics we evaluated for the benchmarks we considered, indicating that neither ISA has a large, inherent advantage over the other, architecturally.

Original language	English
Title of host publication	SC-W '23
Subtitle of host publication	Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing
Publisher	Association for Computing Machinery (ACM)
Pages	1557-1565
Number of pages	9
ISBN (Electronic)	9798400707858
DOIs	https://doi.org/10.1145/3624062.3624233
Publication status	Published - 17 Nov 2023
Event	SC-W 2023: Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis - https://sc23.supercomputing.org/program/workshops/, Denver, United States Duration: 12 Nov 2023 → 17 Nov 2023

Conference

Conference	SC-W 2023
Country/Territory	United States
City	Denver
Period	12/11/23 → 17/11/23

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10.1145/3624062.3624233Licence: CC BY

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Isambard 2 expansion to add new testbeds and expand user base
McIntosh-Smith, S. N. (Principal Investigator)
1/11/21 → 31/03/22
Project: Research

Cite this

@inproceedings{2c90ac93f38846bb995d4fdf8bdf982e,

title = "An Empirical Comparison of the RISC-V and AArch64 Instruction Sets",

abstract = "In this work we perform one of the first in-depth, empirical comparisons of the Arm and RISC-V instruction sets. We compare a series of benchmarks compiled with GCC 9.2 and 12.2, targeting the scalar subsets of Arm{\textquoteright}s Armv-8a and RISC-V{\textquoteright}s rv64g. We analyse instruction counts, critical paths and windowed critical paths to get an estimate of performance differences between the two instruction sets, determining where each has advantages and disadvantages. The results show the instruction sets are relatively closely matched on the metrics we evaluated for the benchmarks we considered, indicating that neither ISA has a large, inherent advantage over the other, architecturally.",

author = "Weaver, {Dan B A} and McIntosh-Smith, {Simon N}",

year = "2023",

month = nov,

day = "17",

doi = "10.1145/3624062.3624233",

language = "English",

pages = "1557--1565",

booktitle = "SC-W '23",

publisher = "Association for Computing Machinery (ACM)",

address = "United States",

note = "SC-W 2023 : Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis ; Conference date: 12-11-2023 Through 17-11-2023",

}

Weaver, DBA & McIntosh-Smith, SN 2023, An Empirical Comparison of the RISC-V and AArch64 Instruction Sets. in SC-W '23: Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing. Association for Computing Machinery (ACM), pp. 1557-1565, SC-W 2023, Denver, Colorado, United States, 12/11/23. https://doi.org/10.1145/3624062.3624233

An Empirical Comparison of the RISC-V and AArch64 Instruction Sets. / Weaver, Dan B A ; McIntosh-Smith, Simon N.
SC-W '23: Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing. Association for Computing Machinery (ACM), 2023. p. 1557-1565.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - An Empirical Comparison of the RISC-V and AArch64 Instruction Sets

AU - Weaver, Dan B A

AU - McIntosh-Smith, Simon N

PY - 2023/11/17

Y1 - 2023/11/17

N2 - In this work we perform one of the first in-depth, empirical comparisons of the Arm and RISC-V instruction sets. We compare a series of benchmarks compiled with GCC 9.2 and 12.2, targeting the scalar subsets of Arm’s Armv-8a and RISC-V’s rv64g. We analyse instruction counts, critical paths and windowed critical paths to get an estimate of performance differences between the two instruction sets, determining where each has advantages and disadvantages. The results show the instruction sets are relatively closely matched on the metrics we evaluated for the benchmarks we considered, indicating that neither ISA has a large, inherent advantage over the other, architecturally.

AB - In this work we perform one of the first in-depth, empirical comparisons of the Arm and RISC-V instruction sets. We compare a series of benchmarks compiled with GCC 9.2 and 12.2, targeting the scalar subsets of Arm’s Armv-8a and RISC-V’s rv64g. We analyse instruction counts, critical paths and windowed critical paths to get an estimate of performance differences between the two instruction sets, determining where each has advantages and disadvantages. The results show the instruction sets are relatively closely matched on the metrics we evaluated for the benchmarks we considered, indicating that neither ISA has a large, inherent advantage over the other, architecturally.

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DO - 10.1145/3624062.3624233

M3 - Conference Contribution (Conference Proceeding)

SP - 1557

EP - 1565

BT - SC-W '23

PB - Association for Computing Machinery (ACM)

T2 - SC-W 2023

Y2 - 12 November 2023 through 17 November 2023

ER -

An Empirical Comparison of the RISC-V and AArch64 Instruction Sets

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Isambard 2 expansion to add new testbeds and expand user base

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