An improved architecture for the adaptive discrete cosine transform

F Martin, DR Bull

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

2 Citations (Scopus)
306 Downloads (Pure)


This paper presents a new approach to the efficient realisation of the discrete cosine transform for the specific case of interlaced image sequence coding. In such cases, the conventional approach of decomposing each frame or frame difference into 8×8 blocks is often no longer satisfactory and an adaptive architecture capable of processing either 8×8 or two 4×8 blocks is desirable. The approach described is based on the decomposition used by Madisetti, modified to maximise shared hardware resources and to exploit arithmetic redundancy using primitive operator methods. The resulting architecture is compared with alternative implementation options using an area-time metric with savings in excess of 50% having been observed.
Translated title of the contributionAn Improved architecture for the adaptive discrete cosine transform
Original languageEnglish
Title of host publicationUnknown
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages742 - 745
ISBN (Print)078030730, 0780330730
Publication statusPublished - May 1996
EventIEEE International Symposium on Circuits and Systems, 1996 - Atlanta, United States
Duration: 1 May 1996 → …


ConferenceIEEE International Symposium on Circuits and Systems, 1996
Abbreviated titleISCAS '96
Country/TerritoryUnited States
Period1/05/96 → …

Bibliographical note

Conference Proceedings/Title of Journal: IEEE intl. symp. on circuits and systems
Rose publication type: Conference contribution

Sponsorship: The authors wish to thank Sony Broadcast and Professional Europe and the Centre for Communications Research at Bristol University for their support of this work.

Terms of use: Copyright © 1996 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 1996 (ISCAS '96).

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