An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Stelios Pitris; Christos Vagionas; Pavlos Maniotis; George T. Kanellos; Nikos Pleros

doi:10.1109/LPT.2016.2572299

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Stelios Pitris, Christos Vagionas, Pavlos Maniotis, George T. Kanellos, Nikos Pleros

Research output: Contribution to journal › Article (Academic Journal) › peer-review

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Abstract

We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

Original language	English
Article number	7478034
Pages (from-to)	1790-1793
Number of pages	4
Journal	IEEE Photonics Technology Letters
Volume	28
Issue number	16
DOIs	https://doi.org/10.1109/LPT.2016.2572299
Publication status	Published - 15 Aug 2016

Keywords

Content Addressable Memories
InP monolithic integration
Optical Look-up
Optical Memories
Photonic integrated circuits Semiconductor Optical Amplifiers

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10.1109/LPT.2016.2572299

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@article{dd89bbd6c73744d4aab1316f32ba14ba,

title = "An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s",

abstract = "We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.",

keywords = "Content Addressable Memories, InP monolithic integration, Optical Look-up, Optical Memories, Photonic integrated circuits Semiconductor Optical Amplifiers",

author = "Stelios Pitris and Christos Vagionas and Pavlos Maniotis and Kanellos, {George T.} and Nikos Pleros",

year = "2016",

month = aug,

day = "15",

doi = "10.1109/LPT.2016.2572299",

language = "English",

volume = "28",

pages = "1790--1793",

journal = "IEEE Photonics Technology Letters",

issn = "1041-1135",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

number = "16",

}

TY - JOUR

T1 - An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

AU - Pitris, Stelios

AU - Vagionas, Christos

AU - Maniotis, Pavlos

AU - Kanellos, George T.

AU - Pleros, Nikos

PY - 2016/8/15

Y1 - 2016/8/15

N2 - We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

AB - We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

KW - Content Addressable Memories

KW - InP monolithic integration

KW - Optical Look-up

KW - Optical Memories

KW - Photonic integrated circuits Semiconductor Optical Amplifiers

UR - http://www.scopus.com/inward/record.url?scp=84979009924&partnerID=8YFLogxK

U2 - 10.1109/LPT.2016.2572299

DO - 10.1109/LPT.2016.2572299

M3 - Article (Academic Journal)

AN - SCOPUS:84979009924

SN - 1041-1135

VL - 28

SP - 1790

EP - 1793

JO - IEEE Photonics Technology Letters

JF - IEEE Photonics Technology Letters

IS - 16

M1 - 7478034

ER -

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

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