An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Stelios Pitris; Christos Vagionas; Pavlos Maniotis; George T. Kanellos; Nikos Pleros

doi:10.1109/LPT.2016.2572299

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Stelios Pitris, Christos Vagionas, Pavlos Maniotis, George T. Kanellos, Nikos Pleros

High Performance Networks Group (HPN)

Research output: Contribution to journal › Article (Academic Journal) › peer-review

23 Citations (Scopus)

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Abstract

We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

Original language	English
Article number	7478034
Pages (from-to)	1790-1793
Number of pages	4
Journal	IEEE Photonics Technology Letters
Volume	28
Issue number	16
DOIs	https://doi.org/10.1109/LPT.2016.2572299
Publication status	Published - 15 Aug 2016

Keywords

Content Addressable Memories
InP monolithic integration
Optical Look-up
Optical Memories
Photonic integrated circuits Semiconductor Optical Amplifiers

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10.1109/LPT.2016.2572299

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abstract = "We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.",

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AU - Pitris, Stelios

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AU - Kanellos, George T.

AU - Pleros, Nikos

PY - 2016/8/15

Y1 - 2016/8/15

N2 - We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

AB - We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

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KW - InP monolithic integration

KW - Optical Look-up

KW - Optical Memories

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JF - IEEE Photonics Technology Letters

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ER -

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

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