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BIST Methodology, Architecture and Circuits for Pre-Bond TSV Testing in 3D Stacking IC Systems

    Research output: Contribution to journalArticle (Academic Journal)peer-review

    33 Citations (Scopus)
    Original languageUndefined/Unknown
    Pages (from-to)139-148
    Number of pages10
    JournalIEEE Transactions on Circuits and Systems I: Regular Papers
    Volume62
    Issue number1
    DOIs
    Publication statusPublished - 2015

    Research Groups and Themes

    • Photonics and Quantum

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