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Abstract
The currently proposed RISC-V True Random Number Generator (TRNG) architecture breaks with previous ISA TRNG practice by splitting the Entropy Source (ES) component away from cryptographic PRNGs into a separate interface, and in its use of polling. We describe the interface, its use in cryptography, and offer additional discussion, background, and rationale for various aspects of it. This design is informed by lessons learned from earlier mainstream ISAs, recently introduced SP 800-90B and FIPS 140-3 entropy audit requirements, AIS 31 and Common Criteria, current and emerging cryptographic needs such as post-quantum cryptography, and the goal of supporting a wide variety of RISC-V implementations and applications. Many of the architectural choices are a result of quantitative observations about random number generators in secure microcontrollers, the Linux kernel, and cryptographic libraries. We further compare the architecture to some contemporary random number generators and describe a minimalistic TRNG reference implementation that uses the Entropy Source together with RISC-V
AES instructions.
AES instructions.
Original language | English |
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DOIs | |
Publication status | Published - Nov 2020 |
Event | 4th Workshop on Attacks and Solutions in Hardware Security - Virtual Event Duration: 13 Sept 2020 → … http://ashesworkshop.org/ |
Workshop
Workshop | 4th Workshop on Attacks and Solutions in Hardware Security |
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Abbreviated title | ASHES’20 |
Period | 13/09/20 → … |
Internet address |
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Dive into the research topics of 'Building a Modern TRNG: An Entropy Source Interface for RISC-V'. Together they form a unique fingerprint.Projects
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SCARV: A side-channel hardened RISC-V platform
Page, D. (Principal Investigator)
1/02/18 → 31/01/23
Project: Research