TY - JOUR
T1 - Carrier-based Closed-loop DC-link Voltage Balancing Algorithm for Four Level NPC Converters based on Redundant Level Modulation
AU - Wang, Jun
AU - Yuan, Xibo
AU - Jin, Bosen
PY - 2020/11/24
Y1 - 2020/11/24
N2 - Four-level neutral-point-clamped (NPC) multilevel converter topologies have been proposed and actively studied for low/medium voltage applications. As an inherent issue with these topologies, the voltage balancing of dc-link capacitors is challenging, especially when it operates as a single-end inverter/rectifier with high power factors and high modulation indexes. This paper proposes a closed-loop voltage balancing algorithm that is effective and simple to implement with regular level-shifter carriers for a four-level NPC converter, e.g. a π-type converter. This approach is based on the Redundant Level Modulation (RLM), which utilizes one additional voltage level in one switching cycle to gain extra controllability of the capacitor voltages without distorting/undermining the fundamental-frequency output voltage. An algorithm based on analytical expressions and logical operations is developed to achieve a dynamic closed-loop voltage balancing with RLM. The proposed method is effective over the full span of linear modulation indexes (M = 0 ~ 1.15) and power factors. The proposed algorithm is validated and evaluated in both simulations and experiments.
AB - Four-level neutral-point-clamped (NPC) multilevel converter topologies have been proposed and actively studied for low/medium voltage applications. As an inherent issue with these topologies, the voltage balancing of dc-link capacitors is challenging, especially when it operates as a single-end inverter/rectifier with high power factors and high modulation indexes. This paper proposes a closed-loop voltage balancing algorithm that is effective and simple to implement with regular level-shifter carriers for a four-level NPC converter, e.g. a π-type converter. This approach is based on the Redundant Level Modulation (RLM), which utilizes one additional voltage level in one switching cycle to gain extra controllability of the capacitor voltages without distorting/undermining the fundamental-frequency output voltage. An algorithm based on analytical expressions and logical operations is developed to achieve a dynamic closed-loop voltage balancing with RLM. The proposed method is effective over the full span of linear modulation indexes (M = 0 ~ 1.15) and power factors. The proposed algorithm is validated and evaluated in both simulations and experiments.
KW - neutral point clamped
KW - redundant level modulation
KW - voltage balancing
KW - multilevel converter
KW - pulse width modulated power converters
KW - pulse width modulation (PWM)
U2 - 10.1109/TIE.2020.3039225
DO - 10.1109/TIE.2020.3039225
M3 - Article (Academic Journal)
SN - 0278-0046
JO - IEEE Transactions on Industrial Electronics
JF - IEEE Transactions on Industrial Electronics
ER -