Closed-Form Equations for Through-Silicon Via (TSV) Parasitics in 3-D Integrated Circuits (ICs)

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

Original language	Undefined/Unknown
Title of host publication	Proc. Special Interest Workshop on 3D Integration -- Design Automation and Test in Europe (DATE)
Publication status	Published - 1 Apr 2009

Research Groups and Themes

@inproceedings{e6b7c6ee06414d47b39e6ebb17035fb2,

title = "Closed-Form Equations for Through-Silicon Via (TSV) Parasitics in 3-D Integrated Circuits (ICs)",

author = "Roshan Weerasekera and Pamunuwa, \{Dinesh B\} and Matt Grange and Hannu Tenhunen and Li-Rong Zheng",

year = "2009",

month = apr,

day = "1",

language = "Undefined/Unknown",

booktitle = "Proc. Special Interest Workshop on 3D Integration -- Design Automation and Test in Europe (DATE)",

}

Closed-Form Equations for Through-Silicon Via (TSV) Parasitics in 3-D Integrated Circuits (ICs). / Weerasekera, Roshan; Pamunuwa, Dinesh B; Grange, Matt et al.
Proc. Special Interest Workshop on 3D Integration -- Design Automation and Test in Europe (DATE). 2009.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Closed-Form Equations for Through-Silicon Via (TSV) Parasitics in 3-D Integrated Circuits (ICs)

AU - Weerasekera, Roshan

AU - Pamunuwa, Dinesh B

AU - Grange, Matt

AU - Tenhunen, Hannu

AU - Zheng, Li-Rong

PY - 2009/4/1

Y1 - 2009/4/1

M3 - Conference Contribution (Conference Proceeding)

BT - Proc. Special Interest Workshop on 3D Integration -- Design Automation and Test in Europe (DATE)

ER -