Combating Digital Noise in High Speed ULSI Circuits Using Binary BCH Encoding

Dinesh Pamunuwa; Li-Rong Zheng; Hannu Tenhunen

doi:10.1109/ISCAS.2000.858676

Combating Digital Noise in High Speed ULSI Circuits Using Binary BCH Encoding

Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

3 Citations (Scopus)

Abstract

Increased integration in deep submicron (DSM) technologies has caused very high increases in the RLC parasitics which affect the coupling of noise to signals propagating over interconnect. Error free transmission on-chip will no longer be guaranteed, This paper examines the issue of high speed signaling in DSM and proposes the use of particular BCH codes to improve the bit error rate in the face of noise. We conclude from our results that it is possible to achieve a considerable coding gain by choosing the code properly

Original language	Undefined/Unknown
Title of host publication	Proc. IEEE International Symposium on Circuits and Systems, (ISCAS)
Pages	13-16
Number of pages	4
Volume	4
DOIs	https://doi.org/10.1109/ISCAS.2000.858676
Publication status	Published - 1 May 2000

Research Groups and Themes

Photonics and Quantum

Keywords

BCH codes
ULSI
digital integrated circuits
error statistics
high-speed integrated circuits
integrated circuit noise
BER improvement
RLC parasitics
binary BCH encoding
bit error rate
deep submicron technologies
digital noise
high speed ULSI circuits
high speed signaling
Bit error rate
Circuit noise
Crosstalk
Delay
Encoding
Integrated circuit interconnections
RLC circuits
Signal design
Switches
Ultra large scale integration

Access to Document

10.1109/ISCAS.2000.858676

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Persistent link

Cite this

@inproceedings{89fafabd002a425284b0862659769958,

title = "Combating Digital Noise in High Speed ULSI Circuits Using Binary BCH Encoding",

abstract = "Increased integration in deep submicron (DSM) technologies has caused very high increases in the RLC parasitics which affect the coupling of noise to signals propagating over interconnect. Error free transmission on-chip will no longer be guaranteed, This paper examines the issue of high speed signaling in DSM and proposes the use of particular BCH codes to improve the bit error rate in the face of noise. We conclude from our results that it is possible to achieve a considerable coding gain by choosing the code properly",

keywords = "BCH codes, ULSI, digital integrated circuits, error statistics, high-speed integrated circuits, integrated circuit noise, BER improvement, RLC parasitics, binary BCH encoding, bit error rate, deep submicron technologies, digital noise, high speed ULSI circuits, high speed signaling, Bit error rate, Circuit noise, Crosstalk, Delay, Encoding, Integrated circuit interconnections, RLC circuits, Signal design, Switches, Ultra large scale integration",

author = "Dinesh Pamunuwa and Li-Rong Zheng and Hannu Tenhunen",

year = "2000",

month = may,

day = "1",

doi = "10.1109/ISCAS.2000.858676",

language = "Undefined/Unknown",

volume = "4",

pages = "13--16",

booktitle = "Proc. IEEE International Symposium on Circuits and Systems, (ISCAS)",

}

TY - GEN

T1 - Combating Digital Noise in High Speed ULSI Circuits Using Binary BCH Encoding

AU - Pamunuwa, Dinesh

AU - Zheng, Li-Rong

AU - Tenhunen, Hannu

PY - 2000/5/1

Y1 - 2000/5/1

N2 - Increased integration in deep submicron (DSM) technologies has caused very high increases in the RLC parasitics which affect the coupling of noise to signals propagating over interconnect. Error free transmission on-chip will no longer be guaranteed, This paper examines the issue of high speed signaling in DSM and proposes the use of particular BCH codes to improve the bit error rate in the face of noise. We conclude from our results that it is possible to achieve a considerable coding gain by choosing the code properly

AB - Increased integration in deep submicron (DSM) technologies has caused very high increases in the RLC parasitics which affect the coupling of noise to signals propagating over interconnect. Error free transmission on-chip will no longer be guaranteed, This paper examines the issue of high speed signaling in DSM and proposes the use of particular BCH codes to improve the bit error rate in the face of noise. We conclude from our results that it is possible to achieve a considerable coding gain by choosing the code properly

KW - BCH codes

KW - ULSI

KW - digital integrated circuits

KW - error statistics

KW - high-speed integrated circuits

KW - integrated circuit noise

KW - BER improvement

KW - RLC parasitics

KW - binary BCH encoding

KW - bit error rate

KW - deep submicron technologies

KW - digital noise

KW - high speed ULSI circuits

KW - high speed signaling

KW - Bit error rate

KW - Circuit noise

KW - Crosstalk

KW - Delay

KW - Encoding

KW - Integrated circuit interconnections

KW - RLC circuits

KW - Signal design

KW - Switches

KW - Ultra large scale integration

U2 - 10.1109/ISCAS.2000.858676

DO - 10.1109/ISCAS.2000.858676

M3 - Conference Contribution (Conference Proceeding)

VL - 4

SP - 13

EP - 16

BT - Proc. IEEE International Symposium on Circuits and Systems, (ISCAS)

ER -