Combating Digital Noise in High Speed ULSI Circuits Using Binary BCH Encoding

Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

3 Citations (Scopus)

Abstract

Increased integration in deep submicron (DSM) technologies has caused very high increases in the RLC parasitics which affect the coupling of noise to signals propagating over interconnect. Error free transmission on-chip will no longer be guaranteed, This paper examines the issue of high speed signaling in DSM and proposes the use of particular BCH codes to improve the bit error rate in the face of noise. We conclude from our results that it is possible to achieve a considerable coding gain by choosing the code properly
Original languageUndefined/Unknown
Title of host publicationProc. IEEE International Symposium on Circuits and Systems, (ISCAS)
Pages13-16
Number of pages4
Volume4
DOIs
Publication statusPublished - 1 May 2000

Keywords

  • BCH codes
  • ULSI
  • digital integrated circuits
  • error statistics
  • high-speed integrated circuits
  • integrated circuit noise
  • BER improvement
  • RLC parasitics
  • binary BCH encoding
  • bit error rate
  • deep submicron technologies
  • digital noise
  • high speed ULSI circuits
  • high speed signaling
  • Bit error rate
  • Circuit noise
  • Crosstalk
  • Delay
  • Encoding
  • Integrated circuit interconnections
  • RLC circuits
  • Signal design
  • Switches
  • Ultra large scale integration

Cite this