Communicating process architecture for multicores

David May

Research output: Contribution to journalArticle (Academic Journal)peer-review

Abstract

Communicating process architecture can be used to build efficient multicore chips scaling to hundreds of processors. Concurrent processing, communications and input-output are supported directly by the instruction set of the cores and by the protoicol used in the on-chip interconect. Concurrent programs are compiled directly to the chip exploting novel compiler optimizations. The architecture supports a variety of programming techniques, ranging from statically configured process netwroks to dynamic reconfiguration and mobile processes.
Original languageEnglish
Pages (from-to)935-948
Number of pages14
JournalConcurrency and Computation: Practice and Experience
Volume22
Issue number8
DOIs
Publication statusPublished - 23 Oct 2009

Fingerprint Dive into the research topics of 'Communicating process architecture for multicores'. Together they form a unique fingerprint.

Cite this