Communicating process architecture can be used to build efficient multicore chips scaling to hundreds of processors. Concurrent processing, communications and input-output are supported directly by the instruction set of the cores and by the protoicol used in the on-chip interconect. Concurrent programs are compiled directly to the chip exploting novel compiler optimizations. The architecture supports a variety of programming techniques, ranging from statically configured process netwroks to dynamic reconfiguration and mobile processes.
|Number of pages||14|
|Journal||Concurrency and Computation: Practice and Experience|
|Publication status||Published - 23 Oct 2009|