Abstract
Error correction codes (ECCs) are commonly used to protect memories against errors. Among ECCs, orthogonal latin squares (OLS) codes have gained renewed interest for memory protection due to their modularity and the simplicity of the decoding algorithm that enables low delay implementations. An important issue is that when ECCs are used, the encoder and decoder circuits can also suffer errors. In this brief, a concurrent error detection technique for OLS codes encoders and syndrome computation is proposed and evaluated. The proposed method uses the properties of OLS codes to efficiently implement a parity prediction scheme that detects all errors that affect a single circuit node.
| Original language | English |
|---|---|
| Article number | 6395842 |
| Pages (from-to) | 2334-2338 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 21 |
| Issue number | 12 |
| DOIs | |
| Publication status | Published - 4 Jan 2013 |
Keywords
- Concurrent error detection
- error correction codes (ECC)
- Latin squares
- majority logic decoding (MLD)
- memory
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