Cryptographic side-channels from low-power cache memory

Philipp Grabher, Johann Groszschaedl, Daniel Page

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

10 Citations (Scopus)

Abstract

To deliver real world cryptographic applications, we are increasingly reliant on security guarantees from both the underlying mathematics and physical implementation. The micro-processors that execute such applications are often designed with a focus on performance, area or power consumption. This strategy neglects physical security, a fact that has recently been exploited by a new breed of micro-architectural side-channel attacks. We introduce a new attack within this class which targets the use of low power cache memories. Although such caches offer an attractive compromise between performance and power consumption within mobile computing devices, we show that they permit attack where a more considered design strategy would not.
Translated title of the contributionCryptographic Side-Channels from Low-Power Cache Memory
Original languageEnglish
Title of host publicationCryptography and Coding - IMACC 2007
PublisherSpringer Berlin Heidelberg
Pages170-184
Volume4887
Publication statusPublished - 2007

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  • Cite this

    Grabher, P., Groszschaedl, J., & Page, D. (2007). Cryptographic side-channels from low-power cache memory. In Cryptography and Coding - IMACC 2007 (Vol. 4887, pp. 170-184). Springer Berlin Heidelberg.