Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions

Ruizhu Wu; Simon Mendy; Jose Ortiz Gonzalez; Saeed Jahdi; Olayiwola Alatise

doi:10.23919/EPE21ECCEEurope50061.2021.9570690

Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions

Ruizhu Wu
, Simon Mendy
, Jose Ortiz Gonzalez
, Saeed Jahdi
, Olayiwola Alatise

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

21 Citations (Scopus)

72 Downloads (Pure)

Abstract

Device-to-device parametric variations (e.g. threshold voltage V TH , gate resistance R G and junction temperature T J ) can cause variations in the short-circuit currents conducted through parallel-connected devices. In this paper, the impact of variations in V TH , R G and T J on current sharing under short-circuits is investigated using measurements and electrothermal modelling. The results show that V TH is the most critical parameter affecting short-circuit current sharing and directly impacts the peak short circuit current. Variations in gate resistance do not impact the short circuit current sharing unless the variation is over 400% thereby indicating catastrophic failure of the gate wirebond. Variation in the initial junction temperature is also not as critical as variations in V TH since the higher temperature device takes less short circuit current. Electrothermal simulations of parallel connected SiC MOSFETs have been developed to analyze how V TH mismatch impacts short circuit current sharing. These simulations allow for the investigation of the impact of V TH mismatch on the electrothermal stresses of the parallel connected MOSFETs.

Original language	English
Title of host publication	2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Number of pages	9
ISBN (Electronic)	9789075815375
ISBN (Print)	9781665433846
DOIs	https://doi.org/10.23919/EPE21ECCEEurope50061.2021.9570690
Publication status	Published - 25 Oct 2021
Event	23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe - Ghent, Belgium Duration: 6 Sept 2021 → 10 Sept 2021

Publication series

Name	European Conference on Power Electronics and Applications
Publisher	IEEE
ISSN (Print)	2325-0313
ISSN (Electronic)	2693-4949

Conference

Conference	23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe
Country/Territory	Belgium
City	Ghent
Period	6/09/21 → 10/09/21

Bibliographical note

Funding Information:
This work was supported in part by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1.

Publisher Copyright:
© 2021 EPE Association.

Keywords

Paralleling
Reliability
Semiconductor Device
Short Circuits
Wide Bandgap Devices

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10.23919/EPE21ECCEEurope50061.2021.9570690Licence: Unspecified

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Wu, R., Mendy, S., Gonzalez, J. O., Jahdi, S., & Alatise, O. (2021). Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions. In 2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe (European Conference on Power Electronics and Applications). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.23919/EPE21ECCEEurope50061.2021.9570690

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title = "Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions",

abstract = "Device-to-device parametric variations (e.g. threshold voltage V TH , gate resistance R G and junction temperature T J ) can cause variations in the short-circuit currents conducted through parallel-connected devices. In this paper, the impact of variations in V TH , R G and T J on current sharing under short-circuits is investigated using measurements and electrothermal modelling. The results show that V TH is the most critical parameter affecting short-circuit current sharing and directly impacts the peak short circuit current. Variations in gate resistance do not impact the short circuit current sharing unless the variation is over 400\% thereby indicating catastrophic failure of the gate wirebond. Variation in the initial junction temperature is also not as critical as variations in V TH since the higher temperature device takes less short circuit current. Electrothermal simulations of parallel connected SiC MOSFETs have been developed to analyze how V TH mismatch impacts short circuit current sharing. These simulations allow for the investigation of the impact of V TH mismatch on the electrothermal stresses of the parallel connected MOSFETs.",

keywords = "Paralleling, Reliability, Semiconductor Device, Short Circuits, Wide Bandgap Devices",

author = "Ruizhu Wu and Simon Mendy and Gonzalez, \{Jose Ortiz\} and Saeed Jahdi and Olayiwola Alatise",

note = "Funding Information: This work was supported in part by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1. Publisher Copyright: {\textcopyright} 2021 EPE Association.; 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe ; Conference date: 06-09-2021 Through 10-09-2021",

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doi = "10.23919/EPE21ECCEEurope50061.2021.9570690",

language = "English",

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address = "United States",

}

Wu, R, Mendy, S, Gonzalez, JO, Jahdi, S & Alatise, O 2021, Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions. in 2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe. European Conference on Power Electronics and Applications, Institute of Electrical and Electronics Engineers (IEEE), 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe, Ghent, Belgium, 6/09/21. https://doi.org/10.23919/EPE21ECCEEurope50061.2021.9570690

Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions. / Wu, Ruizhu; Mendy, Simon; Gonzalez, Jose Ortiz et al.
2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe. Institute of Electrical and Electronics Engineers (IEEE), 2021. (European Conference on Power Electronics and Applications).

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions

AU - Wu, Ruizhu

AU - Mendy, Simon

AU - Gonzalez, Jose Ortiz

AU - Jahdi, Saeed

AU - Alatise, Olayiwola

N1 - Funding Information: This work was supported in part by the UK Engineering and Physical Sciences Research Council (EPSRC) through the grant reference EP/R004366/1. Publisher Copyright: © 2021 EPE Association.

PY - 2021/10/25

Y1 - 2021/10/25

N2 - Device-to-device parametric variations (e.g. threshold voltage V TH , gate resistance R G and junction temperature T J ) can cause variations in the short-circuit currents conducted through parallel-connected devices. In this paper, the impact of variations in V TH , R G and T J on current sharing under short-circuits is investigated using measurements and electrothermal modelling. The results show that V TH is the most critical parameter affecting short-circuit current sharing and directly impacts the peak short circuit current. Variations in gate resistance do not impact the short circuit current sharing unless the variation is over 400% thereby indicating catastrophic failure of the gate wirebond. Variation in the initial junction temperature is also not as critical as variations in V TH since the higher temperature device takes less short circuit current. Electrothermal simulations of parallel connected SiC MOSFETs have been developed to analyze how V TH mismatch impacts short circuit current sharing. These simulations allow for the investigation of the impact of V TH mismatch on the electrothermal stresses of the parallel connected MOSFETs.

AB - Device-to-device parametric variations (e.g. threshold voltage V TH , gate resistance R G and junction temperature T J ) can cause variations in the short-circuit currents conducted through parallel-connected devices. In this paper, the impact of variations in V TH , R G and T J on current sharing under short-circuits is investigated using measurements and electrothermal modelling. The results show that V TH is the most critical parameter affecting short-circuit current sharing and directly impacts the peak short circuit current. Variations in gate resistance do not impact the short circuit current sharing unless the variation is over 400% thereby indicating catastrophic failure of the gate wirebond. Variation in the initial junction temperature is also not as critical as variations in V TH since the higher temperature device takes less short circuit current. Electrothermal simulations of parallel connected SiC MOSFETs have been developed to analyze how V TH mismatch impacts short circuit current sharing. These simulations allow for the investigation of the impact of V TH mismatch on the electrothermal stresses of the parallel connected MOSFETs.

KW - Paralleling

KW - Reliability

KW - Semiconductor Device

KW - Short Circuits

KW - Wide Bandgap Devices

UR - https://www.scopus.com/pages/publications/85119057616

U2 - 10.23919/EPE21ECCEEurope50061.2021.9570690

DO - 10.23919/EPE21ECCEEurope50061.2021.9570690

M3 - Conference Contribution (Conference Proceeding)

AN - SCOPUS:85119057616

SN - 9781665433846

T3 - European Conference on Power Electronics and Applications

BT - 2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe

Y2 - 6 September 2021 through 10 September 2021

ER -

Wu R, Mendy S, Gonzalez JO, Jahdi S, Alatise O. Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions. In 2021 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe. Institute of Electrical and Electronics Engineers (IEEE). 2021. (European Conference on Power Electronics and Applications). doi: 10.23919/EPE21ECCEEurope50061.2021.9570690

Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions

Abstract

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Bibliographical note

Keywords

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