Early Selection of System Implementation Choice among SoC, SoP and 3-D Integration

Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

Abstract

Recently there is a tendency for shifting the planar SoC single-chip solutions to different alternative options as tiled silicon and single-level embedded modules as well as 3-D integration, and the designers confronted with several system design options. To get a true improvement in performance, a very careful analysis using detailed models at different hierarchical levels is crucial. In this work, we present a cohesive analysis of the technological, cost and performance trade-offs for implementing digital and mixed-mode systems considering the choices between 2-D and 3-D integration and their ramifications.
Original languageUndefined/Unknown
Title of host publicationProc. IEEE International Conference on Systems-on-Chip (SOC)
Pages187-190
Number of pages4
DOIs
Publication statusPublished - 1 Sep 2007

Keywords

  • Assembly
  • Costs
  • Performance analysis
  • Power system modeling
  • Shape
  • Silicon
  • Stacking
  • System analysis and design
  • Temperature
  • Wafer bonding

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