Easily Testable Implementation for Bit Parallel Multipliers in GF (2m)

H Rahaman, J Matthew, AM Jabir, DK Pradhan

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

5 Citations (Scopus)
Translated title of the contributionEasily Testable Implementation for Bit Parallel Multipliers in GF (2m)
Original languageEnglish
Title of host publicationIEEE High-Level Design Validation and Test Workshop
Publication statusPublished - 2006

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