Translated title of the contribution | Easily Testable Implementation for Bit Parallel Multipliers in GF(2m) |
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Original language | English |
Title of host publication | IEEE International High Level Design Validation and Test Workshop(HLDVT) |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Publication status | Published - 2006 |
Bibliographical note
Other page information: -Conference Proceedings/Title of Journal: IEEE International High Level Design Validation and Test Workshop(HLDVT)
Other identifier: 2000640