Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test Set

Jimson Mathew, H. Ramahan, Pradhan Dhiraj

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

Abstract

We present a C-testable method for detecting stuck-at (s-a) faults in the polynomial basis (PB) bit parallel multiplier circuits over GF(2m). It requires only 7 tests for detecting faults to provide 100% fault coverage, which is independent of the multiplier size. These 7 tests can be derived directly without any requirement of ATPG tools. Synopsys® tool is used to generate ATPG based test patterns.
Translated title of the contributionEfficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test Set
Original languageEnglish
Title of host publication13th IEEE International On-Line Testing Symposium,Greece
Publication statusPublished - 2007

Bibliographical note

Other page information: -
Conference Proceedings/Title of Journal: 13th IEEE International On-Line Testing Symposium,Greece
Other identifier: 2000705

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