eLIMInate: a Leakage-focused ISE for Masked Implementation

Daniel Page, Hao Cheng, Weijia Wang

Research output: Contribution to journalArticle (Academic Journal)peer-review


Even given a state-of-the-art masking scheme, masked software implementation of some cryptography functionality can pose significant challenges stemming, e.g., from simultaneous requirements for efficiency and security. In this paper we design an Instruction Set Extension (ISE) to address a specific element of said challenge, namely the elimination of leakage stemming from architectural and microarchitectural overwriting. Conceptually, the ISE allows a leakage-focused behavioural hint to be communicated from software to the micro-architecture: using it informs how computation is realised when applied to masking-specific data, which then offers an opportunity to eliminate associated leakage. We develop prototype, latencyand area-optimised implementations of the ISE design based on the RISC-V Ibex core. Using them, we demonstrate that use of the ISE can close the gap between assumptions about and actual behaviour of a device and thereby deliver an improved security guarantee.
Original languageEnglish
Pages (from-to)329-358
Number of pages30
JournalIACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)
Issue number2
Publication statusPublished - 12 Mar 2024

Bibliographical note

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  • side-channel attack, masking, RISC-V, ISE


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