Energy and Latency Optimization in NEM Relay-Based Digital Circuits

Sunil Rana; Qin Tian; Antonios Bazigos; Daniel Grogg; Michel Despont; Christopher L Ayala; Christoph Hagleitner; Adrian Mihai Ionescu; Roberto Canegallo; Dinesh Pamunuwa

doi:10.1109/TCSI.2014.2309752

Energy and Latency Optimization in NEM Relay-Based Digital Circuits

Sunil Rana, Qin Tian, Antonios Bazigos, Daniel Grogg, Michel Despont, Christopher L Ayala, Christoph Hagleitner, Adrian Mihai Ionescu, Roberto Canegallo, Dinesh Pamunuwa

Research output: Contribution to journal › Article (Academic Journal) › peer-review

21 Citations (Scopus)

Abstract

Digital circuits based on nanoelectromechanical (NEM) relays hold out the potential of providing an energy efficiency unachievable by conventional CMOS technology. This paper presents a detailed analysis of the operating characteristics of fabricated curved cantilever NEM relays using a comprehensive physical model. The mode of energy distribution within the electrical and mechanical operational domains of the relay is described in detail and the energy saving achievable by the technique of body-biasing is quantified. The analysis further reveals that the latency in a relay can be much larger or much smaller than the nominal mechanical delay depending on the point of actuation in the oscillation of the beam that takes place after pull-out. The methods that can utilize this phenomenon to reduce the latency of relay-based circuits are discussed, thus addressing one of the biggest challenges in NEM relay-based design.

Original language	English
Pages (from-to)	2348-2359
Number of pages	12
Journal	IEEE Transactions on Circuits and Systems - I: Regular Papers
Volume	61
Issue number	8
DOIs	https://doi.org/10.1109/TCSI.2014.2309752
Publication status	Published - 1 Aug 2014

Research Groups and Themes

Photonics and Quantum

Keywords

cantilevers
digital circuits
nanoelectromechanical devices
relays
NEM relay-based design
NEM relay-based digital circuits
beam oscillation
body-biasing technique
comprehensive physical model
conventional CMOS technology
electrical operational domain
energy distribution model
energy efficiency
energy optimization
energy saving
fabricated curved cantilever NEM relays
latency optimization
latency reduction
mechanical operational domain
nanoelectromechanical relays
nominal mechanical delay
Damping
Force
Integrated circuit modeling
Logic gates
Mathematical model
Relays
Springs
Behavioral model
Nanoelectromechanical (NEM) relay
electrical/mechanical contact model
electromechanical domain
finite element analysis

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/TCSI.2014.2309752

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Persistent link

Professor I D B Pamunuwa
- Dinesh.Pamunuwabristol.acuk
- School of Electrical, Electronic and Mechanical Engineering - Professor of Electronic Engineering
- Microelectronics
Person: Academic , Member

Cite this

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title = "Energy and Latency Optimization in NEM Relay-Based Digital Circuits",

abstract = "Digital circuits based on nanoelectromechanical (NEM) relays hold out the potential of providing an energy efficiency unachievable by conventional CMOS technology. This paper presents a detailed analysis of the operating characteristics of fabricated curved cantilever NEM relays using a comprehensive physical model. The mode of energy distribution within the electrical and mechanical operational domains of the relay is described in detail and the energy saving achievable by the technique of body-biasing is quantified. The analysis further reveals that the latency in a relay can be much larger or much smaller than the nominal mechanical delay depending on the point of actuation in the oscillation of the beam that takes place after pull-out. The methods that can utilize this phenomenon to reduce the latency of relay-based circuits are discussed, thus addressing one of the biggest challenges in NEM relay-based design.",

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author = "Sunil Rana and Qin Tian and Antonios Bazigos and Daniel Grogg and Michel Despont and Ayala, {Christopher L} and Christoph Hagleitner and Ionescu, {Adrian Mihai} and Roberto Canegallo and Dinesh Pamunuwa",

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doi = "10.1109/TCSI.2014.2309752",

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AU - Rana, Sunil

AU - Tian, Qin

AU - Bazigos, Antonios

AU - Grogg, Daniel

AU - Despont, Michel

AU - Ayala, Christopher L

AU - Hagleitner, Christoph

AU - Ionescu, Adrian Mihai

AU - Canegallo, Roberto

AU - Pamunuwa, Dinesh

PY - 2014/8/1

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N2 - Digital circuits based on nanoelectromechanical (NEM) relays hold out the potential of providing an energy efficiency unachievable by conventional CMOS technology. This paper presents a detailed analysis of the operating characteristics of fabricated curved cantilever NEM relays using a comprehensive physical model. The mode of energy distribution within the electrical and mechanical operational domains of the relay is described in detail and the energy saving achievable by the technique of body-biasing is quantified. The analysis further reveals that the latency in a relay can be much larger or much smaller than the nominal mechanical delay depending on the point of actuation in the oscillation of the beam that takes place after pull-out. The methods that can utilize this phenomenon to reduce the latency of relay-based circuits are discussed, thus addressing one of the biggest challenges in NEM relay-based design.

AB - Digital circuits based on nanoelectromechanical (NEM) relays hold out the potential of providing an energy efficiency unachievable by conventional CMOS technology. This paper presents a detailed analysis of the operating characteristics of fabricated curved cantilever NEM relays using a comprehensive physical model. The mode of energy distribution within the electrical and mechanical operational domains of the relay is described in detail and the energy saving achievable by the technique of body-biasing is quantified. The analysis further reveals that the latency in a relay can be much larger or much smaller than the nominal mechanical delay depending on the point of actuation in the oscillation of the beam that takes place after pull-out. The methods that can utilize this phenomenon to reduce the latency of relay-based circuits are discussed, thus addressing one of the biggest challenges in NEM relay-based design.

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Energy and Latency Optimization in NEM Relay-Based Digital Circuits

Abstract

Research Groups and Themes

Keywords

UN SDGs

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Professor I D B Pamunuwa

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