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Abstract
This paper presents a complete video fusion system with hardware acceleration and investigates the energy trade-offs between computing in the CPU or the FPGA device. The video fusion application is based on the Dual-Tree Complex Wavelet Transforms (DT-CWT). Video fusion combines information from different spectral bands into a single representation and advanced algorithms based on wavelet transforms are compute and energy intensive. In this work the transforms are mapped to a hardware accelerator using high-level synthesis tools for the FPGA and also vectorized code for the single instruction multiple data (SIMD) engine available in the CPU. The accelerated system reduces computation time and energy by a factor of 2. Moreover, the results show a key finding that the FPGA is not always the best choice for acceleration, and the SIMD engine should be selected when the wavelet decomposition reduces the frame size below a certain threshold. This dependency on workload size means that an adaptive system that intelligently selects between the SIMD engine and the FPGA achieves the most energy and performance efficiency point.
Original language | English |
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Title of host publication | 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE 2016) |
Subtitle of host publication | Proceedings of a meeting held 14-18 March 2016, Dresden, Germany |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 1399-1404 |
Number of pages | 6 |
ISBN (Electronic) | 9783981537062 |
ISBN (Print) | 9781467392280 |
DOIs | |
Publication status | Published - Jun 2016 |
Event | 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 - Dresden, Germany Duration: 14 Mar 2016 → 18 Mar 2016 |
Conference
Conference | 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 |
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Country/Territory | Germany |
City | Dresden |
Period | 14/03/16 → 18/03/16 |
Keywords
- Energy efficient
- Hybrid FPGA
- video fusion
Fingerprint
Dive into the research topics of 'Energy efficient video fusion with heterogeneous CPU-FPGA devices'. Together they form a unique fingerprint.Projects
- 2 Finished
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ENergy Efficient Adaptive Computing with multi-grain heterogeneous architectures (ENEAC)
Nunez-Yanez, J. L. (Principal Investigator)
5/01/16 → 4/01/20
Project: Research
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Energy Proportional Computing With Heterogeneous and Reconfigurable Processors (ENPOWER)
Nunez-Yanez, J. L. (Principal Investigator)
1/11/13 → 30/04/17
Project: Research