Energy Modelling of Software for a Hardware Multi-threaded Embedded Microprocessor

Steve Kerrison, Kerstin Eder

Research output: Contribution to journalArticle (Academic Journal)peer-review

24 Citations (Scopus)
29 Downloads (Pure)


This paper examines a hardware multi-threaded microprocessor and discusses the impact such an architecture has on existing software energy modelling techniques. A framework is constructed for analysing the energy behaviour of the XMOS XS1-L multi-threaded processor and a variation on existing software energy models is proposed, based on analysis of collected energy data. It is shown that by combining execution statistics with sufficient data on the processor’s thread activity and instruction execution costs, a multi-threaded software energy model used with Instruction Set Simulation can yield an average error margin of less than 7%.
Original languageEnglish
Article number56
JournalACM Transactions on Embedded Computing Systems
Issue number3
Publication statusPublished - Apr 2015


  • Computer architecture
  • Embedded systems
  • ISA-level energy modeling
  • Multithreading
  • Software energy modeling
  • energy aware computing

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