Experimental Estimation of the Window of Vulnerability for Logic Circuits

NN Mahatme, NJ Gaspard, S Jagannathan, TD Loveless, I Chatterjee, BL Bhuva, LW Massengill, RD Schrimpf

Research output: Contribution to journal › Article (Academic Journal) › peer-review

5 Citations (Scopus)

Original language	English
Pages (from-to)	2691-2696
Number of pages	6
Journal	IEEE Transactions on Nuclear Science
Volume	60
Issue number	4
Publication status	Published - 2013

Handle.net

@article{67a31afe90f64d478d2d42b45b593fd5,

title = "Experimental Estimation of the Window of Vulnerability for Logic Circuits",

author = "NN Mahatme and NJ Gaspard and S Jagannathan and TD Loveless and I Chatterjee and BL Bhuva and LW Massengill and RD Schrimpf",

year = "2013",

language = "English",

volume = "60",

pages = "2691--2696",

journal = "IEEE Transactions on Nuclear Science",

issn = "1558-1578",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

number = "4",

}

TY - JOUR

T1 - Experimental Estimation of the Window of Vulnerability for Logic Circuits

AU - Mahatme, NN

AU - Gaspard, NJ

AU - Jagannathan, S

AU - Loveless, TD

AU - Chatterjee, I

AU - Bhuva, BL

AU - Massengill, LW

AU - Schrimpf, RD

PY - 2013

Y1 - 2013

M3 - Article (Academic Journal)

SN - 1558-1578

VL - 60

SP - 2691

EP - 2696

JO - IEEE Transactions on Nuclear Science

JF - IEEE Transactions on Nuclear Science

IS - 4

ER -