Fast 2D-DCT implementations for VLIW processors

OP Sohm, CN Canagarajah, DR Bull

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

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Abstract

This paper analyzes various fast 2D-DCT algorithms regarding their suitability for VLIW processors. Operations for truncation or rounding which are usually neglected in proposals for fast algorithms have also been taken into consideration. Loeffler's algorithm with parallel multiplications was found to be most suitable due to its parallel structure
Translated title of the contributionFast 2D-DCT implementations for VLIW processors
Original languageEnglish
Title of host publicationIEEE Multimedia Signal Processing Workshop
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages655 - 660
ISBN (Print)0780356101
DOIs
Publication statusPublished - Sep 1999
Event3rd IEEE Workshop on Multimedia Signal Processing - Copenhagen, Denmark
Duration: 1 Sep 1999 → …

Conference

Conference3rd IEEE Workshop on Multimedia Signal Processing
CountryDenmark
CityCopenhagen
Period1/09/99 → …

Bibliographical note

Rose publication type: Conference contribution

Terms of use: Copyright © 1999 IEEE. Reprinted from IEEE 3rd Workshop on Multimedia Signal Processing, 1999.

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