FPGA-based modelling unit for high speed lossless arithmetic coding

R Stefo, JL Nunez-Yanez, C Feregrino, S Mahapatra, S Jones

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

8 Citations (Scopus)
Translated title of the contributionFPGA-based modelling unit for high speed lossless arithmetic coding
Original languageEnglish
Title of host publication11th International Conference on Field Programmable Logic and Applications (FPL'2001), Belfast, N Ireland
Publication statusPublished - 27 Aug 2001

Bibliographical note

Conference Proceedings/Title of Journal: 11th International Conference on Field Programmable Logic and Applications (FPL'2001)

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