High bandwidth interconnect design opportunities in 2.5D Through-Silicon interposer (TSI)

Roshan Weerasekera, Ka Fai Chang, Songbai Zhang, Guruprasad Katti, Hong Yu Li, Rahul Dutta

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

10 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)
Pages	241-244
Number of pages	4
DOIs	https://doi.org/10.1109/EPTC.2016.7861479
Publication status	Published - 2016

Structured keywords

@inproceedings{71a60b19350b47a0ad1ccfd9a6817a73,

title = "High bandwidth interconnect design opportunities in 2.5D Through-Silicon interposer (TSI)",

author = "Roshan Weerasekera and Chang, {Ka Fai} and Songbai Zhang and Guruprasad Katti and Li, {Hong Yu} and Rahul Dutta",

year = "2016",

doi = "10.1109/EPTC.2016.7861479",

language = "Undefined/Unknown",

pages = "241--244",

booktitle = "2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)",

}

TY - GEN

T1 - High bandwidth interconnect design opportunities in 2.5D Through-Silicon interposer (TSI)

AU - Weerasekera, Roshan

AU - Chang, Ka Fai

AU - Zhang, Songbai

AU - Katti, Guruprasad

AU - Li, Hong Yu

AU - Dutta, Rahul

PY - 2016

Y1 - 2016

U2 - 10.1109/EPTC.2016.7861479

DO - 10.1109/EPTC.2016.7861479

M3 - Conference Contribution (Conference Proceeding)

SP - 241

EP - 244

BT - 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)

ER -