High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications

M. Radosavljevic; T. Ashley; A. Andreev; S. D. Coomber; G. Dewey; M. T. Emeny; M. Fearn; D. G. Hayes; K. P. Hilton; M. K. Hudait; R. Jefferies; T. Martin; R. Pillarisetty; W. Rachmady; T. Rakshit; S. J. Smith; MJ Uren; D. J. Wallis; P. J. Wilding; R. Chau

doi:10.1109/IEDM.2008.4796798

High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications

M. Radosavljevic
, T. Ashley
, A. Andreev
, S. D. Coomber
, G. Dewey
, M. T. Emeny
, M. Fearn
, D. G. Hayes
, K. P. Hilton
, M. K. Hudait
, R. Jefferies
, T. Martin
, R. Pillarisetty
, W. Rachmady
, T. Rakshit
, S. J. Smith
, MJ Uren
, D. J. Wallis
, P. J. Wilding
, R. Chau

School of Physics

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

66 Citations (Scopus)

Abstract

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm(2)/V-s. The shortest 40nm gate length (L(G)) transistors achieve peak transconductance (G(m)) of 510 mu S/mu m and cut-off frequency (f(T)) of 140GHz at supply voltage of 0.5V. These represent the highest G(m) and f(T) ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

Translated title of the contribution	High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications
Original language	English
Title of host publication	IEEE International Electron Devices Meeting
Pages	727 - 730
Number of pages	4
DOIs	https://doi.org/10.1109/IEDM.2008.4796798
Publication status	Published - 2008

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Radosavljevic, M., Ashley, T., Andreev, A., Coomber, S. D., Dewey, G., Emeny, M. T., Fearn, M., Hayes, D. G., Hilton, K. P., Hudait, M. K., Jefferies, R., Martin, T., Pillarisetty, R., Rachmady, W., Rakshit, T., Smith, S. J., Uren, MJ., Wallis, D. J., Wilding, P. J., & Chau, R. (2008). High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications. In IEEE International Electron Devices Meeting (pp. 727 - 730) https://doi.org/10.1109/IEDM.2008.4796798

@inproceedings{bf1ee4d3d3e047d5b83b6ff7a4d48a5b,

title = "High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications",

abstract = "This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm(2)/V-s. The shortest 40nm gate length (L(G)) transistors achieve peak transconductance (G(m)) of 510 mu S/mu m and cut-off frequency (f(T)) of 140GHz at supply voltage of 0.5V. These represent the highest G(m) and f(T) ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.",

author = "M. Radosavljevic and T. Ashley and A. Andreev and Coomber, \{S. D.\} and G. Dewey and Emeny, \{M. T.\} and M. Fearn and Hayes, \{D. G.\} and Hilton, \{K. P.\} and Hudait, \{M. K.\} and R. Jefferies and T. Martin and R. Pillarisetty and W. Rachmady and T. Rakshit and Smith, \{S. J.\} and MJ Uren and Wallis, \{D. J.\} and Wilding, \{P. J.\} and R. Chau",

year = "2008",

doi = "10.1109/IEDM.2008.4796798",

language = "English",

isbn = "9781424423774",

pages = "727 -- 730",

booktitle = "IEEE International Electron Devices Meeting",

}

Radosavljevic, M, Ashley, T, Andreev, A, Coomber, SD, Dewey, G, Emeny, MT, Fearn, M, Hayes, DG, Hilton, KP, Hudait, MK, Jefferies, R, Martin, T, Pillarisetty, R, Rachmady, W, Rakshit, T, Smith, SJ, Uren, MJ, Wallis, DJ, Wilding, PJ & Chau, R 2008, High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications. in IEEE International Electron Devices Meeting. pp. 727 - 730. https://doi.org/10.1109/IEDM.2008.4796798

High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications. / Radosavljevic, M.; Ashley, T.; Andreev, A. et al.
IEEE International Electron Devices Meeting. 2008. p. 727 - 730.

Research output: Chapter in Book/Report/Conference proceeding › Conference Contribution (Conference Proceeding)

TY - GEN

T1 - High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications

AU - Radosavljevic, M.

AU - Ashley, T.

AU - Andreev, A.

AU - Coomber, S. D.

AU - Dewey, G.

AU - Emeny, M. T.

AU - Fearn, M.

AU - Hayes, D. G.

AU - Hilton, K. P.

AU - Hudait, M. K.

AU - Jefferies, R.

AU - Martin, T.

AU - Pillarisetty, R.

AU - Rachmady, W.

AU - Rakshit, T.

AU - Smith, S. J.

AU - Uren, MJ

AU - Wallis, D. J.

AU - Wilding, P. J.

AU - Chau, R.

PY - 2008

Y1 - 2008

N2 - This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm(2)/V-s. The shortest 40nm gate length (L(G)) transistors achieve peak transconductance (G(m)) of 510 mu S/mu m and cut-off frequency (f(T)) of 140GHz at supply voltage of 0.5V. These represent the highest G(m) and f(T) ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

AB - This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm(2)/V-s. The shortest 40nm gate length (L(G)) transistors achieve peak transconductance (G(m)) of 510 mu S/mu m and cut-off frequency (f(T)) of 140GHz at supply voltage of 0.5V. These represent the highest G(m) and f(T) ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

U2 - 10.1109/IEDM.2008.4796798

DO - 10.1109/IEDM.2008.4796798

M3 - Conference Contribution (Conference Proceeding)

SN - 9781424423774

SP - 727

EP - 730

BT - IEEE International Electron Devices Meeting

ER -

High-Performance 40nm Gate Length InSb P-Channel Compressively Strained Quantum Well Field Effect Transistors for Low-Power (V(CC)=0.5V) Logic Applications

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