| Translated title of the contribution | High performance architectures for chip-to-chip communications on network line cards |
|---|---|
| Original language | English |
| Pages (from-to) | 193 - 209 |
| Number of pages | 16 |
| Journal | Journal of High Speed Networks |
| Volume | 16 (2) |
| Publication status | Published - 2007 |
Bibliographical note
Publisher: IOS PressCite this
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