Identifying Compiler Options to Minimise Energy Consumption for Embedded Platforms

This paper presents an innovative technique to explore the effect on energy consumption of an extensive number of the optimisations a compiler can perform. We evaluate a set of ten carefully selected benchmarks for five different embedded platforms.
A fractional factorial design is used to systematically explore the large optimisation space (2^82 possible combinations), whilst still accurately determining the effects of optimisations and optimisation combinations. Hardware power measurements on each platform are taken to ensure all architectural effects on the energy consumption are captured.
In the majority of cases, execution time and energy consumption are highly correlated. However, predicting the effect a particular optimisation may have is non-trivial due to its interactions with other optimisations. This validates long standing community beliefs, but for the first time provides concrete evidence of the effect and its magnitude.
A further conclusion of this study is the structure of the benchmark has a larger effect than the hardware architecture on whether the optimisation will be effective, and that no single optimisation is universally beneficial for execution time or energy consumption.